GiDEL’s Camera-Machine simulator (GCLS) was developed to address such problems, where a high-performance video test pattern can be generated and used in vision and imaging applications. FPGAs provide the ability to accelerate algorithms operations via parallel processing, making them much better suited for Image and vision applications. So, GCLS has been developed with a combination of FPGA and camera link interface. GCLS enables to mimic the timing characteristics of virtually any Camera Link camera with video clock rates between 7MHz to 85 MHz. GCLS when used in GiDEL’s Machine Simulator (GMS) could be an excellent in circuit vision inspection systems.